Kavyashree Raveendranath, and Swamy TN. “Low-Power Front-End VLSI Design Techniques for Energy-Efficient System-on-Chip Architectures”. International Journal of Research and Review in Applied Science, Humanities, and Technology 1, no. 2 (December 26, 2024): 121–126. Accessed May 25, 2026. https://ijrasht.com/index.php/files/article/view/280.