Kavyashree Raveendranath, and Swamy TN. “Low-Power Front-End VLSI Design Techniques for Energy-Efficient System-on-Chip Architectures”. International Journal of Research and Review in Applied Science, Humanities, and Technology, vol. 1, no. 2, Dec. 2024, pp. 121-6, https://doi.org/10.71143/8m6djn93.