KAVYASHREE RAVEENDRANATH; SWAMY TN. Low-Power Front-End VLSI Design Techniques for Energy-Efficient System-on-Chip Architectures. International Journal of Research and Review in Applied Science, Humanities, and Technology, [S. l.], v. 1, n. 2, p. 121–126, 2024. DOI: 10.71143/8m6djn93. Disponível em: https://ijrasht.com/index.php/files/article/view/280. Acesso em: 10 jun. 2026.