[1]
Kavyashree Raveendranath and Swamy TN 2024. Low-Power Front-End VLSI Design Techniques for Energy-Efficient System-on-Chip Architectures. International Journal of Research and Review in Applied Science, Humanities, and Technology. 1, 2 (Dec. 2024), 121–126. DOI:https://doi.org/10.71143/8m6djn93.